| Commit message (Collapse) | Author | Age | Files | Lines |
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This function can be used to display a more user-friendly representation
of a `HopNum`. This will print hop numbers as 1-indexed values: #1,
#2, etc..
We will soon remove HopNum's Display implementation in favour of
`.display()`.
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This makes `HopNum`s display as 1-indexed values. This will make error
messages more intuitive, because when talking about an N-hop circuit, we
generally speak in terms of hops 1..N (rather than 0..N-1).
Internally, our `HopNum` indices are still 0-based.
Closes #996
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Apply erroneous formatting as demanded by rustfmt.
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Call site as per
https://gitlab.torproject.org/tpo/core/arti/-/merge_requests/1550#note_2936401
Plus a TODO comment with an opinion from me about this API.
(Note not a TODO HSS so this is on the back burner.)
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As per
https://gitlab.torproject.org/tpo/core/arti/-/merge_requests/1550#note_2936400
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Worsify formatting as demanded by rustfmt.
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I doubt this would work yet because it will probably crash at startup
due to the unhandled error case.
Handling the error case would have a conflict with !1549 so let's do
that later.
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This seems logically necessary, and I want to use it in intro point
selection.
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I'm quite unsure about this. Hence the TODOs.
I think the API is right, though.
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tor-hsservice: ipt mgr: Split up idempotently_progress_things_now
See merge request tpo/core/arti!1549
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Break publication out of this function, which was rather long.
This does seem to make conceptual sense, now I've done it. For
example, note how the 2nd half didn't need &mut self, and so doesn't
ever `return CONTINUE;`
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hashx: Additional perf work and cleanup
See merge request tpo/core/arti!1555
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This patch tries to make some of the expressions around NUM_INSTRUCTIONS
more convenient. We can import it directly where it's needed, but most
uses are replaced by new type aliases for InstructionArray and
InstructionVec.
No change to any hashx_cachegrind iai benchmarks
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This is a very simple change, just passing 'self' by reference instead of
value. The by-value version generates a memcpy of the entire temporary
program buffer which doesn't optimize out like I expected it would.
The juicy impact here is a much lower cache footprint for compilation,
since we avoid having yet another temporary storage location for the program
data.
generate_compiled_1000x
Instructions: 271682605 (-0.627292%)
L1 Accesses: 341834751 (-0.813903%)
L2 Accesses: 56420 (-39.48365%)
RAM Accesses: 618 (-20.25806%)
Estimated Cycles: 342138481 (-0.867660%)
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RFC: hashx: More arrays and fewer slices
See merge request tpo/core/arti!1539
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generate_interp_1000x
Instructions: 219216169 (No change)
L1 Accesses: 278017243 (-0.000441%)
L2 Accesses: 1257 (+4389.286%)
RAM Accesses: 415 (-0.479616%)
Estimated Cycles: 278038053 (+0.001744%)
generate_interp_1000x_c
Instructions: 272748034 (No change)
L1 Accesses: 349932964 (No change)
L2 Accesses: 76 (-1.298701%)
RAM Accesses: 411 (+0.243902%)
Estimated Cycles: 349947729 (+0.000009%)
generate_compiled_1000x
Instructions: 256896028 (+0.175731%)
L1 Accesses: 342543838 (+0.131802%)
L2 Accesses: 149273 (-10.34924%)
RAM Accesses: 810 (-0.246305%)
Estimated Cycles: 343318553 (+0.106328%)
generate_compiled_1000x_c
Instructions: 281855218 (No change)
L1 Accesses: 362569035 (-0.000001%)
L2 Accesses: 88 (+1.149425%)
RAM Accesses: 473 (+0.211864%)
Estimated Cycles: 362586030 (+0.000010%)
interp_u64_hash_1000x
Instructions: 13450926 (No change)
L1 Accesses: 16622561 (+0.000024%)
L2 Accesses: 28 (No change)
RAM Accesses: 390 (-1.015228%)
Estimated Cycles: 16636351 (-0.000817%)
interp_8b_hash_1000x_c
Instructions: 8618541 (No change)
L1 Accesses: 12316160 (-0.000008%)
L2 Accesses: 80 (No change)
RAM Accesses: 433 (+0.231481%)
Estimated Cycles: 12331715 (+0.000276%)
compiled_u64_hash_100000x
Instructions: 87311792 (+0.000520%)
L1 Accesses: 94396598 (+0.000463%)
L2 Accesses: 215 (+2.380952%)
RAM Accesses: 774 (-0.641849%)
Estimated Cycles: 94424763 (+0.000304%)
compiled_8b_hash_100000x_c
Instructions: 91547640 (No change)
L1 Accesses: 98838166 (-0.000007%)
L2 Accesses: 137 (+3.007519%)
RAM Accesses: 488 (+0.618557%)
Estimated Cycles: 98855931 (+0.000119%)
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This partially implements the descriptor publisher reactor.
The code still has many TODOs and there are no tests.
Partially implements #977
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`wait_for_netdir` is needed by the descriptor publisher (to compute the
initial netdir).
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This will be used by the descriptor publisher when building descriptors.
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This function will be used by the descriptor publisher (it needs to
generate descriptors, and for that it needs the subcredential, which can
be derived from the `HsBlindIdKey` and `TimePeriod`).
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Yet another new module concurrently with a new lint.
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hashx: More arrays (redux), unsafe FixedCapacityVec
See merge request tpo/core/arti!1538
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These pass miri too.
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To support testing.
No change to iai benchmarks.
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generate_interp_1000x
Instructions: 219216169 (-0.408535%)
L1 Accesses: 278018470 (-0.322766%)
L2 Accesses: 28 (+12.00000%)
RAM Accesses: 417 (+0.724638%)
Estimated Cycles: 278033205 (-0.322706%)
generate_interp_1000x_c
Instructions: 272748034 (No change)
L1 Accesses: 349932964 (-0.000002%)
L2 Accesses: 77 (+1.315789%)
RAM Accesses: 410 (+1.234568%)
Estimated Cycles: 349947699 (+0.000050%)
generate_compiled_1000x
Instructions: 256445375 (-0.349434%)
L1 Accesses: 342092951 (-0.266541%)
L2 Accesses: 166505 (+9.182175%)
RAM Accesses: 812 (+0.370828%)
Estimated Cycles: 342953896 (-0.245532%)
generate_compiled_1000x_c
Instructions: 281855218 (No change)
L1 Accesses: 362569037 (-0.000002%)
L2 Accesses: 87 (No change)
RAM Accesses: 472 (+1.287554%)
Estimated Cycles: 362585992 (+0.000056%)
interp_u64_hash_1000x
Instructions: 13450926 (-0.006631%)
L1 Accesses: 16622557 (-0.005384%)
L2 Accesses: 28 (No change)
RAM Accesses: 394 (+0.510204%)
Estimated Cycles: 16636487 (-0.004959%)
interp_8b_hash_1000x_c
Instructions: 8618541 (No change)
L1 Accesses: 12316161 (-0.000032%)
L2 Accesses: 80 (No change)
RAM Accesses: 432 (+0.934579%)
Estimated Cycles: 12331681 (+0.001103%)
compiled_u64_hash_100000x
Instructions: 87311338 (-0.001022%)
L1 Accesses: 94396161 (-0.000947%)
L2 Accesses: 210 (-0.943396%)
RAM Accesses: 779 (+0.386598%)
Estimated Cycles: 94424476 (-0.000846%)
compiled_8b_hash_100000x_c
Instructions: 91547640 (No change)
L1 Accesses: 98838173 (-0.000003%)
L2 Accesses: 133 (-0.746269%)
RAM Accesses: 485 (+0.831601%)
Estimated Cycles: 98855813 (+0.000134%)
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