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tor-proto: Make some imports more precise
See merge request tpo/core/arti!1543
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A warning is getting in my way when I run
cargo clippy -p tor-hsservice --all-features
See also
https://gitlab.torproject.org/tpo/core/arti/-/issues/1006#note_2932088
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Rerun maint/add_warning
See merge request tpo/core/arti!1542
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Fixes CI. There was a semantic conflict between !1535 (which added a
suppression) and !1523 (which added a new module).
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clippy: Suppress needless_pass_by_value in tests
See merge request tpo/core/arti!1535
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Rationale: same as for useless_vec, as in 01cb7ee0a112.
Prompted by reading a commit where someone did makework to get rid of
an occurrence of this warning.
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hss: use send_raw_msg in rend_handshake.
See merge request tpo/core/arti!1536
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tor-netdoc: Remove redundant `IntroPointDesc` struct.
See merge request tpo/core/arti!1528
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Removing the private `IntroPointDesc` isn't really a breaking change,
and neither is changing the type of `HsDescBuilder::intro_points`'s
argument (because nobody would've been able to this function in the
first place as `IntroPointDesc` was never exported from tor-netdoc), so
let's remove the semver.md.
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This commit replaces `tor_netdoc::hsdesc::inner::IntroPointDesc` with
the (almost identical) `tor_netdoc::hsdesc::IntroPointDesc`.
The only difference between the two structs is that
`inner::IntroPointDesc` wraps a `Vec<LinkSpec>` instead of a
`Vec<EncodedLinkSpec>`. Since `EncodedLinkSpec` can be derived from
`LinkSpec` (and vice-versa), and since `hsdesc::inner::IntroPointDesc`
never made it in our public API, this commit also removes
`hsdesc::inner::IntroPointDesc` in favour of `hsdesc::IntroPointDesc`.
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ipt establisher API: pass a struct to new()
See merge request tpo/core/arti!1540
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One of rustfmt's changes here is wrong. Whatever.
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Now new() only has a reasonable number of arguments and removes some
repetition in the mocking arrangements in the IPT Manager.
This is the minimum amount that needs to be done in the commit that
touches both the IPT Establisher and the Manager.
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hashx_cachegrind: factor out some common stuff in benchmarks
See merge request tpo/core/arti!1529
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The macro generates similar but not identical code.
There are new bindings.
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This is going to be more obviously useful in a moment.
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The macro generates precisely the existing code.
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The macro generates precisely the existing code.
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About half of an IPT Manager
See merge request tpo/core/arti!1523
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As per
https://gitlab.torproject.org/tpo/core/arti/-/merge_requests/1523#note_2934367
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As per
https://gitlab.torproject.org/tpo/core/arti/-/merge_requests/1523#note_2934299
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As per
https://gitlab.torproject.org/tpo/core/arti/-/merge_requests/1523#note_2934300
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As per
https://gitlab.torproject.org/tpo/core/arti/-/merge_requests/1523#note_2934298
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There are many TODOs and no tests, but it does compile.
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I still think putting these in svc/ module doesn't make much sense.
Anyway, we can leave them there for now, but I need to get at them
from crate::ipt_establisher.
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This module is perhaps rather more comprehensive than needed right
now. But I found I kept wanting to change which bits of it I used.
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Sync is actually otiose - and I'm about to have some test cases with
futures that aren't Sync.
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hashx: Performance improvements for program generation
See merge request tpo/core/arti!1524
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This is a very small change that converts our Vec cheaply into a boxed
slice during program generation. Program generation speed shows no
changes, and there's no change when using compiled hashes, but is a
surprisingly effective 10% speedup to interpreted hash execution.
Signed-off-by: Micah Elizabeth Scott <[email protected]>
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I was looking for ways to optimize out the many redundant capacity
checks in the Assembler. I didn't find any promising approaches, but
I also saw no evidence that it was an important bottleneck. (A simple
unsafe fix didn't improve any important metrics)
While I was in there, I tightened up the buffer size definitions for
both x86_64 and aarch64, and added assertions to test the limits we
set for the size of prologue, epilogue, and single instructions.
I kept some of the inlining and data type tweaks, even though benchmarks
show no difference. They seem like a step in the right direction, from
the disassembly at least.
Signed-off-by: Micah Elizabeth Scott <[email protected]>
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This is a very simple change that avoids a surprising performance
pitfall: using the code() method on an enum from another crate
caused a non-inlined function call in code where we otherwise expect
a high level of compiler optimization. Replacing code() with a cast
to u8 avoids this function call and allows more intensive optimization
at the call site.
Signed-off-by: Micah Elizabeth Scott <[email protected]>
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This hoists a few decisions out of the innermost portions of
choose_dst_reg, by moving what we can out of dst_register_allowed.
Wallclock time benchmarks:
generate-interp improves, -6.0%
Cachegrind benchmarks:
generate_interp_1000x, -5.0% instructions, -11.6% L2 access, -6% RAM
Signed-off-by: Micah Elizabeth Scott <[email protected]>
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I was trying to eliminate all the places where we copied a Program
(about 4100 bytes) except for the one final copy into a Box; but that
approach was proving too annoying. Even returning a Program via Result
will cause multiple unnecessary copies that don't optimize out.
This patch switches approaches, and instead allocates a Vec<Instruction>
presized to the correct capacity. This allocation is made as early as
possible and retained for the lifetime of the program if necessary.
This means we'll never avoid a heap allocation, but we can always
avoid extra copies and we don't need a separate Box for interpreted
programs.
Performance effects are subtle. Overall wallclock time doesn't change
much. Cachegrind shows some accesses moving up from RAM to L2 cache.
Using GDB to probe memcpy sizes shows that large (>1024b) memcpy are now
totally gone in the generate-interp test.
Signed-off-by: Micah Elizabeth Scott <[email protected]>
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Closer inspection of the CPU counters showed that the branching in
RegisterSet::index() was a big problem, contributing to the overall
CPU frontend stall bottleneck in program generation.
This new version is less general, and closer to the appraoch used by
the original C implementation. We store a sorted ArrayVec of in-set
registers, and most operations construct the RegisterSet only once
using a combined filter predicate.
Choosing a register from a set is now cheaper in branches, instructions,
and L1 cache space. We now very rarely manipulate an entire RegisterSet
in any way other than by selecting a register randomly. (Just for the
register R5 special case.)
Wallclock time benchmarks:
generate-interp improves, -7.0%
generate-x86_64 improves, -7.2%
Cachegrind benchmarks:
generate_interp_1000x, more total instructions run but a large
decrease in frontend cache misses. +4.6% instructions, +11% L1
accesses, -99% L2 access, -40% RAM access.
generate_compiled_100x, +4.0% instructions, +9.4% L1 access.
cache miss improvements: -57% L2 access, -25% RAM access.
Signed-off-by: Micah Elizabeth Scott <[email protected]>
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There was a special case in writer_pair_allowed for making add and
subtract equivalent. This patch changes RegisterWriter's encoding, using
per-opcode variants instead of per-format variants. The Add/Sub merge
can now happen earlier, when RegisterWriter is constructed.
Before and after RegisterWriter sizes are the same, at 8 bytes.
This patch removes many uses of Option<RegisterWriter> in favor
of using a new RegisterWriter::None default, and passes by value
rather than by reference.
Wallclock time benchmarks:
generate-interp improves, -7.5%
generate-x86_64 improves, -5.3%
Cachegrind benchmarks:
generate_interp_1000x, negligible change in total instructions,
improvement in cache footprint: -22.8% L2 accesses
Signed-off-by: Micah Elizabeth Scott <[email protected]>
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Fix a few typos.
See merge request tpo/core/arti!1532
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I spotted these while I was working on something else.
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Fix a few warnings from nightly clippy
See merge request tpo/core/arti!1533
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